IEEE広島支部後援 講演会(20160408)


場所:広島市立大学 情報科学部棟別館6階交流ラウンジ

題目: The Time-Triggered Architecture
講師: Em.Prof. Dr. Hermann Kopetz (Vienna University of Technology)

The Time-Triggered Architecture (TTA) provides a computing infrastructure for the
design and implementation of dependable distributed embedded systems that is widely
deployed in industry, e.g., in the
Boeing 787 aircraft or the NASA Orion Spacecraft.
A large real-time application is decomposed into nearly autonomous clusters and
nodes, and a fault-tolerant global time base of known precision is generated at
every node. In the TTA, this global time
is used to precisely specify the interfaces among the nodes, to simplify the
communication and agreement protocols, to perform prompt error detection, and to
guarantee the timeliness of real-time app
lications. The TTA supports a two-phased design methodology, architecture design,
and component design. During the architecture design phase, the interactions among
the distributed components and the
interfaces of the components are fully specified in the value domain and in the
temporal domain. In the succeeding component implementation phase, the components
are built, taking these interface spec
ifications as constraints. This two-phased design methodology is a prerequisite for
the composability of applications implemented in the TTA and for the reuse of
prevalidated components within the TTA
. This talk presents the architecture model of the TTA, explains the design
rationale, discusses the time-triggered communication protocols TTP/C and
TT-Ethernet, and illustrates how transparent fault
tolerance can be implemented in the TTA.


広島市立大学 角田良明 TEL:082-830-1696
E-mail: kakuda& (送信時に&を@に換えてください)