Polytronic 2007 Tutorial
Short Course 2
January 16. 2007 15:00-15:50, 17:00-17:50
Polytronic Conference Site
ACCELERATED LIFE TESTING (ALT) IN MICRO-, OPTO-ELECTRONICS, AND PHOTONICS
-Role, Attributes, Challenges, Pitfalls, and Interaction with Qualification Tests
Lecturer: Dr. Ephraim Suhir
Distinguished Member of Technical Staff (ret.), Bell Laboratories, Basic Research, Murray Hill, NJ,
University of California, Santa Cruz, CA, University of Maryland, College Park, MD, and ERS Co.,
Course Scope and Objective
An overview of accelerated life tests (ALTs) will be presented. The course will address the objectives, attributes, challenges, pitfalls, associated with the use of ALTs, as well as their interaction with qualification tests. The role is emphasized that ALTs should play in the development, design, qualification and manufacturing of micro- and opto-electronic (photonic) products.
Summary:
Accelerated life tests (ALTs) are aimed at the revealing and understanding the physics of expected or occurred failures, as well as at the accumulation of representative failure statistics.
ALTs are able to both detect the possible failure modes and mechanisms and to quantitatively evaluate the roles of the phenomena and processes that might lead to failures.
Adequately designed, carefully conducted, and properly interpreted ALTs provide a consistent basis for obtaining the ultimate information of the reliability of a product - the probability of failure.
ALTs can dramatically facilitate the solutions to the problems of cost effectiveness and time-to-market.
ALTs can help a manufacturer to make his device a product, and therefore should play an important role in the evaluation, prediction and assurance of the reliability of micro- and opto-electronic devices and systems.
In the majority of cases, ALTs should be conducted in addition to the qualification tests, which are required by the existing standards. There might be also situations, when ALTs can be used as an effective substitution for qualification tests.
Whenever possible, ALTs should be used as a consistent basis for the improvement of the existing qualification specifications.
Course Outline
| 1. | IntroductionSummary |
| 2. | What is 3D Integration?Reliability: what is it? |
| 3. | Types of 3D Integration TechnologiesReliability is a complex property |
| 4. | Motivation for 3D IntegrationThree classes of engineering products |
| 5. | Commercial AvailabilityReliability, cost and time-to-market |
| 6. | Description of 3D ICsFailure to provide adequate reliability might be too costly |
| 7. | Description of 3D Integration of ICsRequired reliability level: “reliability costs money” |
| 8. | Description of 3D PackagingOverall approach to reliability should be optimized |
| 9. | Cost IssuesManufacturer must understand the physics of failure |
| 10. | Thermal Management IssuesReliability should be taken care of on the permanent basis |
| 11. | ApplicationsNew products, qualification tests (QTs) and accelerated life tests (ALTs) |
| 12. | ConclusionsWhat should/could be done to prevent failure |
| 13. | Ways to improve reliability: redundancy, maintenance, warranty |
| 14. | Test types, accelerated tests |
| 15. | Modes and mechanisms of failure |
| 16. | Accelerated test levels |
| 17. | Dependability, reparability and availability |
| 18. | Qualification tests and standards |
| 19. | Accelerated life tests (ALTs) |
| 20. | How are accelerated test conditions selected |
| 21. | Most common accelerated test conditions |
| 22. | Acceleration factor |
| 23. | Accelerated test categories: product development tests (PDTs), qualification tests (QTs), Accelerated life tests (ALTs) and highly accelerated life tests (HALTs) |
| 24. | Failure mechanisms and accelerated stresses |
| 25. | ALTs and HALT’s: pitfalls and challenges |
| 26. | Burn-ins |
| 27. | Wear-out failures |
| 28. | Non-destructive evaluation (NDE) tests |
| 29. | Predictive modeling |
| 30. | Probability of failure |
| 31 | Conclusions |
Biography
Dr Suhir is Distinguished Member of Technical Staff (ret.), Bell Laboratories, Basic Research Area, Physical Sciences and Engineering Research Division (from October 1984 until June 2001). Fellow of the ASME, the IEEE, the APS and the SPE Co-founder and Editor-in-Chief of the ASME Journal of Electronic Packaging (1995-2003).
He has authored more than 250 technical publications (papers, book chapters, books, patents), including monographs “Structural Analysis of Microelectronic and Fiber Optic Systems”, Van-Nostrand, 1991 and “Applied Probability for Engineers and Scientists”, McGraw-Hill, 1997. Dr. Suhir’s publications are widely cited in professional literature. He received numerous distinguished service and professional awards, including: 2004 ASME Worcester Warner Medal, 2001 IMAPS John A. Wagnon Technical Achievement Award, 2000 IEEE Outstanding Sustained Technical Contribution Award, 2000 SPE Fred O. Conley Award, and 1999 ASME and Pi-Tau-Sigma Charles Russ Richards Memorial Award. He is member of the IEEE Technical Advisory Board (TAB), Distinguished Lecturer of the IEEE CPMT (Components, Packaging and Manufacturing Technologies) Society and Member of the Board of Governors of this Society. He is also Member-at-Large of the IEEE Technical Activities Board, New Technologies Directions Committee, and Chairman of the IEEE TAB NTDC Group on portable information devices. He presented numerous invited and keynote talks in universities and at professional conferences worldwide, and taught many professional development and university courses on various topics of materials, reliability and mechanical problems in micro-, opto-electronics and other areas of engineering and applied science, and organized many successful conferences and symposia in different areas of Applied Physics and Materials Engineering.