============================================================

     IEEE EDS Japan Chapter 会員各位

     IEEE EDS Kansai Chapter 会員各位

 

                             IEEE Electron Devices Society Japan Chapter

                                                        Chair 木村 紳一郎

                                                      Vice Chair 鳥海 明

 

 DL(Distinguished Lecturer)講演会のお知らせ

 

IEEE EDS Distinguished LecturerProf. Xing Zhou

School of Electrical & Electronic Engineering

Nanyang Technological University,Singapore

による下記のDL講演会を開催致します。皆様のご参加を頂きたくご案内申し上げます。

 

---------------------------------------------

DL(Distinguished Lecturer)講演会のお知らせ

 

【日 時】平成23826日(金)午後330分〜430

【会 場】東京工業大学すずかけ台キャンパス

     S2棟7階 会議室

   (横浜市緑区長津田町4259、最寄り駅:東急田園都市線すずかけ台駅)

【講演者】Prof. Xing Zhou

          School of Electrical & Electronic Engineering

          Nanyang Technological University, Singapore

 

【タイトル】

     " Unification of MOS Compact Models with the Unified Regional  "

 

【概要】

This talk presents the motivation and philosophy behind the development of a compact model (Xsim) for unification of MOSFET models with the unified regional modeling (URM) approach.  It is based on unified regional surface-potential solutions for bulk-MOS, which can be extended to generic double-gate (including SOI and nanowire) MOSFETs with common/independent-gate biasing and with/without body contact.  The

DC/AC model is physically scalable in geometry/bias as well as in body thickness and doping, encompassing partial/full-depletion and volume/strong inversion.  New paradigm shift in “ground-referencing” and “source/drain by label” provides complete Gummel symmetry while allowing physical modeling of asymmetric devices, which also provides easy extension to include contact effects for modeling pn-junction as well as Schottky-barrier (SB) and dopant-segregated Schottky (DSS) source/drain.  The core model is directed towards modeling emerging devices and technologies in one unified framework without duplicating efforts, which also provides seamless transitions among various device structures and operations, with selectable accuracy for simulation and

verification of future-generation ULSI circuits.

 

<現地連絡先>

---------------------------------

東京工業大学 フロンティア研究機構

岩 井   洋

226-8502 横浜市緑区長津田町4259

Mail-BoxJ2-68

TEL:045-924-5471

FAX:045-924-5584

E-mail:iwai.h.aa@m.titech.ac.jp

---------------------------------

 

==========================================================