IEEE 関西支部会員各位 IEEE CAS Society Kansai Chapter Chair 小西 啓治 IEEE CAS Society Kansai Chapter では、神戸大学との共催にて、IEEE CASのDistinguished Lecturer (DL)である、テキサス大学オースティン校の Nan Sun 准教授をお招きして、2019年6月7日(金) に神戸大学にて下記のように技術 講演会を開催いたします。 IEEE 会員の皆様ご自身の参加はもちろんのこと、お近くの技術者・研究者の 方々へも本講演会をご案内下さい。非会員の方でも無料で聴講いただけますの で、ご興味のある方々をお誘いあわせの上、奮ってご参加下さい。              記      IEEE CASS Kansai Chapter 技術講演会 【日時】2019年6月7日(金) 14:00-17:00 【場所】神戸大学 六甲台第2キャンパス 百年記念館 六甲ホール http://www.med.kobe-u.ac.jp/GRADN/GAKUI/jyuyosiki-map080110.pdf 【講師】Assoc. Prof. Dr. Nan Sun (テキサス大学オースティン校 准教授) (Associate Professor, University of Texas at Austin) 【講演題目1】 "When SAR meets ΔΣ - Hybridization of SAR and sigma-delta ADCs" 【講演1要旨】SAR is widely used for medium resolution applications due to its simplicity, scaling compatibility, and low-power consumption. However, its power efficiency degrades as the resolution increases due to its tight requirement on the comparator noise and the exponentially growing capacitor DAC array. By contrast, ΔΣ ADC is a popular architecture for high-resolution applications. Taking advantage of noise shaping, it can achieve high resolution with a low-resolution quantizer and DAC. However, it typically requires the use of op-amps that are power hungry and scaling unfriendly. This talk will present latest hybrid ADCs that aim to combine the merits of SAR and ΔΣ while simultaneously obviating their drawbacks. After providing a high-level review of published works, this talk will take a deep dive into two interesting noise-shaping SAR ADC architectures. The first one uses fully passive switched-capacitor filter to achieve 2nd-order noise shaping. It is fully dynamic and can be easily duty cycled. In addition, it is robust and calibration free. Thus, it is well suited for low-power sensor applications. The second one adopts an error-feedback structure, which simplifies the filter design. It consumes very low power by using a dynamic amplifier and address its process, voltage, and temperature (PVT) sensitivity via a fast-convergence background calibration loop. 【講演題目2】 "New Ingredients in the Pot - Rethink Analog IC Design -" 【講演2要旨】I will present several unconventional data conversion architectures. First, I will talk about how we can perform data conversion below the Nyquist rate by exploiting the sparsity of the input signal. I will show two example compressive sensing ADCs and how the effective ADC conversion rate can be reduced by 4 times but without losing information. Second, I will show how we can prevent the seemingly inevitable kT/C noise in a Nyquist-rate ADC by using a continuous-time SAR based 1st-stage. This can substantially reduce the requirement on the ADC input capacitance, greatly reducing the ADC driver power and reference buffer power. Third, I will talk about how we can make use of noise, which is usually deemed as an undesirable thing, to estimate the conversion residue and increase the SNR of a SAR ADC. It is an interesting example of stochastic resonance, in which the presence of noise can lead to not SNR degradation but SNR enhancement. 【参加費・参加申込み】  参加無料  事前のお申し込みは必要ありません。  非会員の方でも無料で聴講いただけますので、お誘いあわせの上、  奮ってご参加下さい。 【お問い合わせ】 CASS Kansai Secretary 藤田玄 Email: g-fujita"at"osakac.ac.jp ("at"を@に置き換えて下さい) 以上