IEEE SSCS Kansai Chapter Technical Seminar

IEEE SSCS Kansai Chapterでは，下記の日程で技術セミナーを開催致しました．
今回はInternatioal Solid-State Circuits Conference (ISSCC) 2019報告会で，
2019年2月のISSCC（サンフランシスコ，米国）で発表された注目論文を17名の方からご講演いただき，
またISSCC2019トレンドと次回のISSCC2020に通すコツについて， ISSCC TPCメンバからご講演いただきました．

日時
2019年3月4日（月）9:00より18:25

会場
神戸大学・梅田インテリジェントラボラトリ; 講義室． Access Map

主催
IEEE Solid-State Circuits Society Kansai Chapter

共催
IEEE Solid-State Circuits Society Japan Chapter,
ISSCC Far-East Regional Committee,
神戸大学大学院科学技術イノベーション研究科

講演

9:00-9:05
Opening

9:05-9:30
ISSCC 2019 レビュー講演
Makoto Takamiya

9:30-9:55
A 400×400-Pixel 6μm-Pitch Vertical Avalanche Photodiodes CMOS Image Sensor Based on 150ps-Fast Capacitive Relaxation Quenching in Geiger Mode for Synthesis of Arbitrary Gain Images Yutaka Hirose

9:55-10:10
An 80Gb/s 300GHz-Band Single-Chip CMOS Transceiver Sangyeop Lee

10:10-10:35
A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR Jian Pang

10:35-11:00
A 265μW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS Someya Teruki

11:00-11:25
A 22ng/√Hz 17mW MEMS Accelerometer with Digital Noise-Reduction Techniques Yuki Furubayashi

11:25-11:50
A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology Noboru Shibata

11:50-13:05
Lunch

ISSCC2019トレンドと次回のISSCC2020に通すコツ

13:05-13:15
DC Takashi Oshima

13:05-13:15
IMMD Kazuko Nishimura

13:25-13:35
MEM Shinichiro Shiratake

13:35-13:45
RF Minoru Fujishima

13:45-13:55
WLS Yu Watanabe

13:55-14:05
TD Makoto Nagata

14:05-14:30
A 20.5TOPS and 217.3GOPS/mm2 Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications Yutaka Yamada

14:30-14:55
A 2×30k-Spin Multichip Scalable Annealing Processor Based on a Processing-In-Memory Approach for Solving Large-Scale Takashi Takemoto

14:55-15:20
A 28nm 600MHz Automotive Flash Microcontroller with Virtualization-Assisted Processor for Next-Generation Automotive Architecture Complying with ISO26262 ASIL-D Norimasa Otsuki

15:20-15:45
A 25.6Gb/s Uplink-Downlink Interface Employing PAM-4-Based 4-Channel Multiplexing and Cascaded CDR Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems Takashi Toi

15:45-16:00
Break

16:00-16:15
A 4.5V/ns Active Slew-Rate-Controlling Gate Driver with Robust Discrete-Time Feedback Technique for 600V Superjunction MOSFETs Shusuke Kawai

16:15-16:40
A 32×32-Pixel 0.9THz Imager with Pixel-Parallel 12b VCO-Based ADC in 0.18μm CMOS Sayuri Yokoyama

16:40-17:05
An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz Masanori Natsui

17:05-17:30
Micro Short-Circuit Detector Including S/H Circuit for 1hr Retention and 52dB Comparator Composed of C-Axis Aligned Crystalline IGZO FETs for Li-Ion Battery Protection IC Takayuki Ikeda

17:30-17:55
A 48GHz 5.6mW Gate-Level-Pipelined Multiplier Using Single-Flux Quantum Logic Ikki Nagaoka

17:55-18:20
Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2×10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping Haosheng Zhang

18:20-18:25
Closing

参加者
大阪メイン会場：70名, 東京サテライト：17名

大阪メイン会場
集合写真
Osaka

東京サテライト会場
集合写真
Tokyo

Last modified: Mar. 18, 2019

日時	2019年3月4日（月）9:00より18:25
会場	神戸大学・梅田インテリジェントラボラトリ; 講義室． Access Map
主催	IEEE Solid-State Circuits Society Kansai Chapter
共催	IEEE Solid-State Circuits Society Japan Chapter, ISSCC Far-East Regional Committee, 神戸大学大学院科学技術イノベーション研究科
講演
	9:00-9:05	Opening
	9:05-9:30	ISSCC 2019 レビュー講演	Makoto Takamiya
	9:30-9:55	A 400×400-Pixel 6μm-Pitch Vertical Avalanche Photodiodes CMOS Image Sensor Based on 150ps-Fast Capacitive Relaxation Quenching in Geiger Mode for Synthesis of Arbitrary Gain Images	Yutaka Hirose
	9:55-10:10	An 80Gb/s 300GHz-Band Single-Chip CMOS Transceiver	Sangyeop Lee
	10:10-10:35	A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR	Jian Pang
	10:35-11:00	A 265μW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS	Someya Teruki
	11:00-11:25	A 22ng/√Hz 17mW MEMS Accelerometer with Digital Noise-Reduction Techniques	Yuki Furubayashi
	11:25-11:50	A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology	Noboru Shibata
	11:50-13:05	Lunch
		ISSCC2019トレンドと次回のISSCC2020に通すコツ
	13:05-13:15	DC	Takashi Oshima
	13:05-13:15	IMMD	Kazuko Nishimura
	13:25-13:35	MEM	Shinichiro Shiratake
	13:35-13:45	RF	Minoru Fujishima
	13:45-13:55	WLS	Yu Watanabe
	13:55-14:05	TD	Makoto Nagata
	14:05-14:30	A 20.5TOPS and 217.3GOPS/mm2 Multicore SoC with DNN Accelerator and Image Signal Processor Complying with ISO26262 for Automotive Applications	Yutaka Yamada
	14:30-14:55	A 2×30k-Spin Multichip Scalable Annealing Processor Based on a Processing-In-Memory Approach for Solving Large-Scale	Takashi Takemoto
	14:55-15:20	A 28nm 600MHz Automotive Flash Microcontroller with Virtualization-Assisted Processor for Next-Generation Automotive Architecture Complying with ISO26262 ASIL-D	Norimasa Otsuki
	15:20-15:45	A 25.6Gb/s Uplink-Downlink Interface Employing PAM-4-Based 4-Channel Multiplexing and Cascaded CDR Circuits in Ring Topology for High-Bandwidth and Large-Capacity Storage Systems	Takashi Toi
	15:45-16:00	Break
	16:00-16:15	A 4.5V/ns Active Slew-Rate-Controlling Gate Driver with Robust Discrete-Time Feedback Technique for 600V Superjunction MOSFETs	Shusuke Kawai
	16:15-16:40	A 32×32-Pixel 0.9THz Imager with Pixel-Parallel 12b VCO-Based ADC in 0.18μm CMOS	Sayuri Yokoyama
	16:40-17:05	An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz	Masanori Natsui
	17:05-17:30	Micro Short-Circuit Detector Including S/H Circuit for 1hr Retention and 52dB Comparator Composed of C-Axis Aligned Crystalline IGZO FETs for Li-Ion Battery Protection IC	Takayuki Ikeda
	17:30-17:55	A 48GHz 5.6mW Gate-Level-Pipelined Multiplier Using Single-Flux Quantum Logic	Ikki Nagaoka
	17:55-18:20	Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2×10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping	Haosheng Zhang
	18:20-18:25	Closing
参加者		大阪メイン会場：70名, 東京サテライト：17名
大阪メイン会場集合写真
東京サテライト会場集合写真