IEEE SSCS Japan/Kansai Chapter Technical Seminar

IEEE SSCS Japan/Kansai Chapterでは，下記の日程で技術セミナーを開催致しました．
今回はAsian Solid-State Circuits Conference (A-SSCC) 2015報告会です．
2015年11月のISSCC（アモイ，中国）で発表された注目論文を，10名の方 からご講演いただきました．

日時	2015年1月13日（水）10:00より17:05(予定)
会場	東京大学VDEC武田先端知ビル・武田ホール; Access Map
主催	IEEE Solid-State Circuits Society Kansai Chapter IEEE Solid-State Circuits Society Japan Chapter
講演
	10:00-10:10	Opening Makoto Nagata, IEEE SSCS Kansai Chapter Vice Chair, Kobe University.
	10:10-10:30	A-SSCC 2015 レビュー講演 Makoto Ikeda, A-SSCC 2015 TPC Chair, The University of Tokyo.
	10:30-10:55	Lecture 1 (Security分野), 3.2 "Review Fault Attacks on ECC Implementations with Fault Sensitivity Analysis" Yang Li (Nanjing Uiversity of Aeronautics and Astronautics, China), Kazuo Sakiyama (University of Electro-Communications)
	10:55-11:20	Lecture 2 (Security分野), 3.4 "Recent Results of Dopant-Based Circuit Camouflage Technique" Takeshi Sugawara (Mitsubishi Electronic Corporation, Japan)
	11:20-11:45	Lecture 3 (Security分野), 3.5 "Advanced Cryptographic Functionalities to Enhance the Internet of Things" Tsutomu Matsumoto (Yokohama National University)
	11:45-13:30	Lunch
	13:30-13:55	Lecture 4 (Advanced System Technologies: Power, Sensing & Testing分野), 2.3 "A Cost Effective Test Screening Method on 40-nm 4-Mb Embedded SRAM for Low-Power MCU" Yoshisato Yokoyama (Renesas System Design), Yuichiro Ishii (Renesas Electrocnics Corp.), Toshihiro Inada (Renesas System Design), Koji Tanaka (Renesas System Design), Miki Tanaka (Renesas System Design), Yoshiki Tsujihashi (Renesas Electrocnics Corp.), Koji Nii (Renesas Electrocnics Corp.)
	13:55-14:20	Lecture 5 (Memory分野), 10.2 "0.6V Operation, 26% Smaller Voltage Ripple, 9% Energy Efficient Boost Converter with Adaptively Optimized Comparator Bias-Current for ReRAM Program in Low Power IoT Embedded Applications" Tomoya Ishii (Chuo University), Shogo Hachiya (Chuo University), Sheyang Ning (Chuo University), Masahiro Tanaka (Chuo University), Ken Takeuchi(Chuo University)
	14:20-14:45	Lecture 6 (Memory分野), 10.4 "A 7T-SRAM with Data-Write Technique by Capacitive Coupling" Daisaburo Takasihma (Toshiba Corp.), Masato Endo (Toshiba Corp.), Kazuhiro Shimazaki (Toshiba Microelectronics Corp.), Manabu Sai (Toshiba Microelectronics Corp.), Masaaki Tanino (Toshiba Information Systems Corp.)
	14:45-15:15	Break
	15:15-15:40	Lecture 7 (mm-Wave Building blocks分野), 7.1 "124-GHz CMOS Quadrature Voltage-Controlled Oscillator with Fundamental Injection Locking" Kyoya Takano (Hiroshima University), Kosuke Katayama (Hiroshima University), Takeshi Yoshida (Hiroshima University), Shuhei Amakawa (Hiroshima University), Minoru Fujishima (Hiroshima University)
	15:40-16:05	Lecture 8 (RF Building Blocks & Transceivers分野), 21.1 "A 3.6 GHz Fractional-N Digital PLL Using SAR-ADC-Based TDC with -110 dBc/Hz in-Band Phase Noise" Zule Xu (Tokyo Institute of Technology), Masaya Miyahara (Tokyo Institute of Technology), Akira Matsuzawa (Tokyo Institute of Technology)
	16:05-16:30	Lecture 9 (DC-DC Converter分野), 20.1 "A Fully-Integrated, High-Conversion-Ratio and Dual-Output Voltage Boost Converter with MPPT for Low-Voltage Energy Harvesting" Toshihiro Ozaki (Kobe University), Tetsuya Hirose (Kobe University), Hiroki Asano (Kobe University), Nobutaka Kuroki (Kobe University), Masahiro Numa (Kobe University)
	16:30-16:55	Lecture 10 (Advanced System Technologies: Power, Sensing & Testing分野), 2.5 "A 24-Bit Multi-Functional Sensor Analog Front End Employing Low Noise Biasing Technique with 8.2nV/sqrt-Hz Input Referred Noise" Masahiko Maruyama (SHARP Corporation), Shigenari Taguchi (SHARP Corporation), Masafumi Yamanoue (SHARP Corporation), Kunihiko Iizuka (SHARP Corporation)
	16:55-17:05	Closing Takeshi Yamamura, IEEE SSCS Japan Chapter Chair, Fujitsu Lab. Ltd.
	参加者	45名（IEEE Member：29名、Non-Member：16名）
	集合写真（発表者，聴講者，役員）